The present invention relates to a semiconductor device, and more specifically, to a nanosheet field effect transistor (FET) with buried oxide (BOX) isolation on the substrate.
Nanosheet FETs are semiconductor devices that offer a structure that promises to facilitate the pursuit for reduced gate sizes below 7 nanometers (nm), 5 nm, and beyond. The smaller transistors allow higher performance and lower power consumption. The channel region between the source and drain regions is defined by horizontal silicon sheets, called nanosheets or a nanosheet stack. A fin FET, which has a channel region defined by a fin, is an example of a tri-gate FET, because the gate contacts three surfaces (top and two sides) of the fin-shaped channel. The nanosheet FET is a gate-all-around FET, because the gate contacts all four surfaces of each of the nanosheets in the stack that defines the channel region.